Conventional optical projection lithography has been the standard silicon patterning technology for the past 20 years. It is an economical process due to its inherently high throughput, thereby providing a desirable low cost per part or die produced. A considerable infrastructure (including steppers, photomasks, resists, metrology, etc.) has been built up around this technology.
In this process, a photomask, or “reticle”, includes a semiconductor circuit layout pattern typically formed of opaque chrome, on a transparent glass (typically SiO2) substrate. A stepper includes a light source and optics that project light coming through the photomask to image the circuit pattern, typically with a 4× to 5× reduction factor, on a photo-resist film formed on a wafer. The term “chrome” refers to an opaque masking material that is typically but not always comprised of chrome. The transmission of the opaque material on the photomask may also vary, such as in the case of an attenuating phase shift mask.
The process of making the photomask begins by receiving data from a design database. The design database contains data describing at least a portion of an integrated circuit design layout, referred to as the “drawn” pattern, which generally provides a target pattern that the designers wish to achieve on the wafer. Techniques for forming design databases are well known in the art.
After receiving the design database, mask makers form one or more photomasks that can be used to implement the target pattern described by the design data. This mask making process may generally include generating mask pattern data describing initial photomask patterns for forming device features. The initial photomask patterns are formed by employing various resolution enhancement techniques. The resolution enhancement techniques can include splitting the drawn pattern so that it is patterned using two or more photomasks, such as, for example, a phase shift mask and a trim mask, for use in an alternating phase shift process (“altPSM”). Alternative phase shift processes may also be referred to as strong phase shift or Levinson phase shift technologies. Such resolution enhancement techniques for forming initial photomask patterns from design data are well known in the art.
After the initial photomask patterns are formed, a proximity correction process is carried out that corrects the mask pattern data for proximity effects. The proximity correction process generally involves running proximity correction software to perform calculations that alter the shape of the initial photomask pattern to take into account proximity effects, such as optical diffraction effects that occur during the imaging process in this method, a computer simulation program is often used to compute image-like model values that are taken to represent the features formed for a particular photomask feature pattern or group of patterns. Based on these simulated model values, the photomask pattern can be altered and then simulated again to determine if the altered pattern will improved the printed features. This process can be repeated until the result is with desired specifications. The features added to a photomask pattern based on this procedure are called optical proximity correction features.
After proximity correction has been performed, verification of the mask pattern data can be performed. This can include running various quality checks to determine whether the photomask patterns generated will form the desired pattern for implementing the circuit specified in the drawn data. The mask pattern data can then be sent to a mask shop, where the actual photomasks are fabricated from the mask pattern data.
One of the most common commercial implementations of alternating phase shift mask technology is the double exposure method. In this method, the critical device features to be patterned are imaged using a phase shift mask, and the non-critical and trim features are imaged in a second exposure using a conventional chrome-on-glass mask, such as a trim mask. In the past, both the phase exposure and trim exposure were performed using a single photoresist.
More recently, a new process has been developed, referred to herein as two-print/two-etch (“2p/2e”) or “double patterning,” in which a first mask exposure and a second mask exposure, such as a phase exposure and trim exposure, are each performed on separate photoresists. The patterns from each of the photoresists can be individually transferred to, for example, a hardmask. In some processes, rather than employing a hardmask, the first and second mask patterns can be transferred directly to the wafer using the first and second photoresist patterns in two separate etch steps.
In 2p/2e processes, a first pattern may be formed in a first photoresist. The first pattern can then be transferred to a hardmask using an etching technique and the first photoresist removed. A second pattern can then be formed in a second photoresist and the resulting photoresist pattern is then transferred to the hardmask using a second etching step. Subsequently, the hardmask pattern, having both the first and second patterns etched therein, is used to etch the wafer.
The 2p/2e process allows for improvements in critical dimension control over single resist processing. However, the ever increasing densities of integrated circuit devices can make achieving the desired critical dimensions extremely difficult. Further refinements of the 2p/2e processing techniques are desired in order to achieve improved critical dimension control.